Aussie engineers use 2D printing process to manufacture nano-thin memory chips

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Image credit: University of Sydney

Engineers at the University of Sydney have developed a 2D printing process using liquid metals that could pave the way to manufacturing more advanced and energy-efficient computing hardware at the nanoscale. 

The latest innovation comes amid a growing global demand for memory devices, which require significant energy to produce and use. 

The process combined tin, zirconium, and hafnium in a precise ratio, melting the alloy below 500 degrees, which is far lower than the individual melting points for zirconium and hafnium. 

Dr Mohammad Ghasemian, the study’s lead author from the School of Chemical and Biomolecular Engineering, said reducing the temperature at which zirconium and hafnium become less liquid is crucial to developing lower-cost electrical devices as far less energy is required. 

“Tin is abundant, low cost and can be used at a large scale for the manufacture of critical semiconductors, transistors and memory chips,” said Ghasemian. 

“Though hafnium zirconium oxide is a well-known ferroelectric material used in nanoscale applications, like memory devices and sensors, obtaining nanosheets using conventional techniques is both difficult and costly.” 

By applying the tin tin-zirconium-hafnium alloy, the research team has successfully harvested the nano-thin tin oxide layer dropped with hafnium zirconium oxide through exfoliation, lifting it from its liquid surface. 

It could then be 2D printed on a substrate as ferroelectric nanosheets. 

“The alloy is like a solvent that allows us to remove that ink and then use it for printing. Our process allows us to harvest this precious crust layer and turn it into ultra-thin sheets, which are then used to manufacture electronics,” said Dr Ghasemian. 

“It could be a new source of functional 2D materials which are not accessible by conventional methods. This process allows us to introduce ferroelectricity into much smaller, 2D metal oxides, allowing for the development of next generation nanoelectronics at low temperatures.”